The present invention relates to a variable gain amplifier and a filter circuit, and more particularly, to a single-input multi-output variable gain amplifier and a filter circuit provided with the same.
Read channel systems for DVDs and the like use a technology of shaping the waveform of a raw signal from a disc to read the signal correctly. The waveform shaping is often realized by adjusting the zero position of a filter. Therefore, a filter for waveform shaping used in read channel systems is required to have an adaptive waveform shaping function that permits waveform shaping optimum for each signal from a disc. To attain adaptive waveform shaping, the filter must have an adjusting function of rendering the zero position variable.
FIG. 10 is a block diagram of a conventional second-order bi-quad GMC filter capable of adjusting the zero position. The bi-quad GMC filter of FIG. 10 includes transconductors 71 and 72, capacitors 73 and 74 and amplifiers 75 and 76. The amplifiers 75 and 76 are provided for adjusting the zero position. The amplifier 75 outputs an input signal Vin to the transconductor 71 as it is (xc3x971) without amplification. The amplifier 76 amplifies the input signal Vin by A times (xc3x97A) and outputs the amplified signal to the transconductor 72. The transfer function of the GMC filter of FIG. 10 is represented by expression:                                           V            ⁢            out                                V            ⁢            in                          =                              gm            ⁡                          (                              gm                +                sC1A                            )                                                          gm              2                        +            sC1gm            +                                          s                2                            ⁢              C2C1                                                          (        1        )            
where C1 and C2 are the capacitances of the capacitors 73 and 74, respectively, Vout is the output of the filter, and s is a Laplace variable. The zero position of the filter is represented by:
gm/(C1xc3x97A). 
It is therefore found that the zero position of the filter can be adjusted by adjusting the gain A of the amplifier 76.
The above description is for generation of the first-order zero. For generation of a second- or higher-order zero, the same bi-quad GMC filters as that of FIG. 10 may be connected sequentially.
The amplifiers 75 and 76 used in the GMC filter of FIG. 10 are required to have ideal characteristics of being small in deterioration of the phase rotation and gain within the band of the filter, and thus, high-speed operation is necessary. To fulfill this requirement, the power consumption and circuit area of the amplifiers 75 and 76 tend to be large.
The input signal Vin to the filter is branched by the amplifiers 75 and 76, and the branched signals are input into the transconductors 71 and 72. It is desirable that the difference in delay time between the signal from the amplifier 75 and the signal from the amplifier 76 is zero idealistically. If there is a delay time difference between these signals, the transfer function will fail to have a form as represented by expression (1), and the characteristics will be deviated from the idealistic characteristics. In particular, the group delay characteristic will be deviated enormously. Since the amplifiers 75 and 76 shown in FIG. 10 are different in gain, the signal delay time tends to be deviated. As a result, the group delay error of the filter tends to be great.
An object of the present invention is providing a variable gain amplifier capable of reducing the circuit area.
Another object of the present invention is providing a filter circuit capable of reducing the group delay error.
According to one aspect of the present invention, the variable gain amplifier includes an input node pair, a first output node pair, a voltage-current converter, a plurality of first resistances, a first current source, a second current source, a second output node pair, a third output node pair and a switch circuit.
The input node pair receives a differential signal. The voltage-current converter outputs a differential current corresponding to a voltage between one and the other of the input node pair to the first output node pair. The plurality of first resistances are connected in series between one and the other of the first output node pair. The first current source is connected between a power supply node receiving the supply voltage and one of the first output node pair. The second current source is connected between the power supply node and the other of the first output node pair. The second output node pair receives a voltage at the first output node pair. The switch circuit connects an interconnection node among interconnection nodes connecting the plurality of first resistances to one of the third output node pair, and connects another interconnection node among the interconnection nodes connecting the plurality of first resistances to the other of the third output node pair.
In the variable gain amplifier described above, a differential signal supplied to the input node pair is amplified with a predetermined gain (first gain), and the amplified signal is output from the second output node pair. The differential signal is also amplified with a gain (second gain) corresponding to the resistance value between one interconnection node and another interconnection node, among the interconnection nodes connecting the plurality of first resistances, connected to the third output node pair via the switch circuit, and the amplified signal is output from the third output node pair. The second gain can be changed by changing the interconnection nodes connected to the third output node pair via the switch circuit. Thus, the variable gain amplifier described above has two functions as an amplifier having the first gain and as an amplifier having the second (variable) gain. Therefore, the circuit area can be reduced compared with the case of providing a first-gain amplifier and a second-gain amplifier separately, and thus the power consumption can be reduced.
The voltage at the second output node pair is a voltage at both ends of the plurality of first resistances, and the voltage at the third output node pair is a voltage at in-between positions of the plurality of first resistances. Therefore, the voltage at the second output node pair and the voltage at the third output node pair match in phase with each other. This reduces the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to the third output node pair, compared with the case of providing a first-gain amplifier and a second-gain amplifier separately.
Preferably, the voltage-current converter includes a first transistor, a second transistor, a third current source, a fourth current source and a second resistance.
The first transistor is connected between one of the first output node pair and a ground node receiving the ground voltage, and receives a voltage input via one of the input node pair at a gate function terminal. The second transistor is connected between the other of the first output node pair and the ground node, and receives a voltage input via the other of the input node pair at a gate function terminal. The third current source is connected in series with the first transistor between the one of the first output node pair and the ground node, and supplies a bias current to the first transistor. The fourth current source is connected in series with the second transistor between the other of the first output node pair and the ground node, and supplies a bias current to the second transistor. The second resistance is connected between a source function terminal of the first transistor and a source function terminal of the second transistor.
The gate function terminal corresponds to the gate when the first and second transistors are MOS transistors, and corresponds to the base when they are bipolar transistors. The drain function terminal corresponds to the drain when the first and second transistors are MOS transistors, and corresponds to the collector when they are bipolar transistors. The source function terminal corresponds to the source when the first and second transistors are MOS transistors, and corresponds to the emitter when they are bipolar transistors. These definitions of the gate function terminal, the drain function terminal and the source function terminal apply throughout the specification.
In the variable gain amplifier described above, the ratio of the output current/input voltage of the current-voltage converter is determined with the second resistance. The output current from the voltage-current converter is converted again into a voltage with the plurality of first resistances. Therefore, the gain (first gain) between the input node pair and the second output node pair can be roughly determined with the ratio of the first resistances to the second resistance. In addition, the differential signal is amplified with a gain (second gain) corresponding to the ratio of the resistance value between an interconnection node and another interconnection node, among the interconnection nodes connecting the plurality of first resistances, connected to the third output node pair, to the second resistance value, and the amplified signal is output from the third output node pair. This eliminates the necessity of a special circuit for gain adjustment, and as a result, the circuit scale can be reduced.
Preferably, the voltage-current converter includes a first transistor, a second transistor, a third transistor and a fourth transistor.
The first transistor is connected between one of the first output node pair and a ground node receiving the ground voltage, and receives a voltage input via one of the input node pair at a gate function terminal. The second transistor is connected between the other of the first output node pair and the ground node, and receives a voltage input via the other of the input node pair at a gate function terminal. The third transistor is connected in series with the first transistor between the one of the first output node pair and the ground node, and receives a predetermined bias at a gate function terminal. The fourth transistor is connected in series with the second transistor between the other of the first output node pair and the ground node, and receives a predetermined bias at a gate function terminal.
In the variable gain amplifier described above, the voltage-current converter is advantageously excellent in linearity. Therefore, a wide dynamic range is secured, and this allows handling of a large-amplitude signal. In addition, the gain of the variable gain amplifier can also be changed by changing the value of the bias applied to the gate function terminals of the third and fourth transistors.
Preferably, the switch circuit includes a plurality of first switch elements. The plurality of first switch elements are placed to correspond to the interconnection nodes connecting the plurality of first resistances for connecting/disconnecting the corresponding interconnection nodes to/from one or the other of the third output node pair.
In the variable gain amplifier described above, one of the first switch elements corresponding to an interconnection node, among the interconnection nodes connecting the plurality of first resistances, to be connected to one of the third output node pair is turned ON to connect the interconnection node in question to the one of the third output node pair. Also, one of the first switch elements corresponding to another interconnection node, among the interconnection nodes connecting the plurality of first resistances, to be connected to the other of the third output node pair is turned ON to connect the interconnection node in question to the other of the third output node pair.
Preferably, the variable gain amplifier further includes a second switch element and a third switch element. The second switch element is connected in the conducting state between one of the first output node pair and one of the second output node pair. The third switch element is connected in the conducting state between the other of the first output node pair and the other of the second output node pair.
In the variable gain amplifier described above, in which the second and third switch elements are provided, the difference in load between the second output node pair and the third output node pair can be reduced. This enables further reduction of the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to the third output node pair.
Preferably, the variable gain amplifier further includes a first capacitor and a second capacitor. The first capacitor is connected between one of the second output node pair and a ground node receiving the ground voltage. The second capacitor is connected between the other of the second output node pair and the ground node.
Preferably, the variable gain amplifier further includes a first capacitor and a second capacitor. The first capacitor is connected between one of the third output node pair and a ground node receiving the ground voltage. The second capacitor is connected between the other of the third output node pair and the ground node.
In the variable gain amplifier described above, in which the first and second capacitors are provided, the difference between the load capacitance connected to the second output node pair and the load capacitance connected to the third output node pair can be reduced. This enables further reduction of the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to the third output node pair.
According to another aspect of the present invention, the filter circuit is a GMC filter circuit including a plurality of transconductors and a plurality of capacitors. The plurality of capacitors are placed to correspond to the plurality of transconductors. The plurality of capacitors are connected between output nodes of the corresponding transconductors and a ground node receiving the ground voltage. The filter circuit further includes the variable gain amplifier described above. The plurality of transconductors include a first transconductor and a second transconductor. The first transconductor receives at an input a voltage from the second output node pair of the variable gain amplifier. The second transconductor receives at an input a voltage from the third output node pair of the variable gain amplifier.
In the filter circuit described above, in which the variable gain amplifier described above is used as an amplifier for adjusting the zero position, the circuit area can be reduced compared with conventional filter circuits.
In addition, since the variable gain amplifier can reduce the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to the third output node pair, deterioration in filter characteristics, in particular, deterioration in group delay can be minimized.
Preferably, one of the input node pair of the variable gain amplifier receives one of a differential input signal to be supplied to the filter circuit, and the other of the input node pair of the variable gain amplifier receives the other of the differential input signal to be supplied to the filter circuit.
Preferably, the plurality of transconductors include a third transconductor. One of the input node pair of the variable gain amplifier receives one of a differential output signal from the third transconductor, and the other of the input node pair of the variable gain amplifier receives the other of the differential output signal from the third transconductor.
According to yet another aspect of the present invention, the variable gain amplifier includes an input node pair, a first output node pair, a voltage-current converter, a plurality of first resistances, a first current source, a second current source, a second output node pair, a plurality of third output node pairs and a plurality of switch circuits.
The input node pair receives a differential signal. The voltage-current converter outputs a differential current corresponding to a voltage between one and the other of the input node pair to the first output node pair. The plurality of first resistances are connected in series between one and the other of the first output node pair. The first current source is connected between a power supply node receiving the supply voltage and one of the first output node pair. The second current source is connected between the power supply node and the other of the first output node pair. The second output node pair receives a voltage at the first output node pair. The plurality of switch circuits are placed to correspond to the plurality of third output node pairs. Each of the plurality of switch circuits connects one of the corresponding third output node pair to an interconnection node among interconnection nodes connecting the plurality of first resistances and connects the other of the corresponding third output node pair to another interconnection node among the interconnection nodes connecting the plurality of first resistances.
In the variable gain amplifier described above, a differential signal supplied to the input node pair is amplified with a predetermined gain (first gain), and the amplified signal is output from the second output node pair. The differential signal is also amplified with a gain (second gain) corresponding to the resistance value between one interconnection node and another interconnection node, among the interconnection nodes connecting the plurality of first resistances, connected to any of the third output node pairs corresponding to each of the switch circuits via the switch circuit in question, and the amplified signal is output from the third output node pair corresponding to the switch circuit in question. The second gain can be changed by changing either one or both of the interconnection nodes connected to any of the third output node pairs via the corresponding switch circuit. Thus, the variable gain amplifier described above has functions as an amplifier having the first gain and as a plurality of amplifiers having the second (variable) gains. Therefore, the circuit area can be reduced compared with the case of providing a first-gain amplifier and a plurality of second-gain amplifiers separately, and thus the power consumption can be reduced.
The voltage at the second output node pair is a voltage at both ends of the plurality of first resistances, and the voltages at the plurality of third output node pairs are voltages at in-between positions of the plurality of first resistances. Thus, the voltage at the second output node pair and the voltages at the plurality of third output node pairs match in phase with each other. This enables reduction of the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to each of the plurality of third output node pairs, compared with the case of providing a first-gain amplifier and a plurality of second-gain amplifiers separately.
Preferably, the voltage-current converter includes a first transistor, a second transistor, a third current source, a fourth current source and a second resistance.
The first transistor is connected between one of the first output node pair and a ground node receiving the ground voltage, and receives a voltage input via one of the input node pair at a gate function terminal. The second transistor is connected between the other of the first output node pair and the ground node, and receives a voltage input via the other of the input node pair at a gate function terminal. The third current source is connected in series with the first transistor between the one of the first output node pair and the ground node, and supplies a bias current to the first transistor. The fourth current source is connected in series with the second transistor between the other of the first output node pair and the ground node, and supplies a bias current to the second transistor. The second resistance is connected between a source function terminal of the first transistor and a source function terminal of the second transistor.
Preferably, the voltage-current converter includes a first transistor, a second transistor, a third transistor and a fourth transistor.
The first transistor is connected between one of the first output node pair and a ground node receiving the ground voltage, and receives a voltage input via one of the input node pair at a gate function terminal. The second transistor is connected between the other of the first output node pair and the ground node, and receives a voltage input via the other of the input node pair at a gate function terminal. The third transistor is connected in series with the first transistor between the one of the first output node pair and the ground node, and receives a predetermined bias at a gate function terminal. The fourth transistor is connected in series with the second transistor between the other of the first output node pair and the ground node, and receives a predetermined bias at a gate function terminal.
Preferably, each of the plurality of switch circuits includes a plurality of first switch elements. The plurality of first switch elements are placed to correspond to the interconnection nodes connecting the plurality of first resistances. Each of the plurality of first switch elements connects/disconnects the corresponding interconnection node to/from one or the other of the corresponding third output node pair.
In each of the switch circuits of the variable gain amplifier described above, one of the first switch elements corresponding to an interconnection node, among the interconnection nodes connecting the plurality of first resistances, to be connected to one of the third output node pair corresponding to the switch circuit in question is turned ON to connect the interconnection node in question to the one of the third output node pair. Also, one of the first switch elements corresponding to another interconnection node to be connected to the other of the third output node pair is turned ON to connect the interconnection node in question to the other of the third output node pair.
Preferably, the variable gain amplifier further includes a second switch element and a third switch element. The second switch element is connected between one of the first output node pair and one of the second output node pair in the conducting state. The third switch element is connected between the other of the first output node pair and the other of the second output node pair in the conducting state.
In the variable gain amplifier described above, in which the second and third switch elements are provided, the difference in load between the second output node pair and each of the plurality of third output node pairs can be reduced. This enables further reduction of the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to each of the plurality of third output node pairs.
Preferably, the variable gain amplifier further includes a first capacitor and a second capacitor. The first capacitor is connected between one of the second output node pair and a ground node receiving the ground voltage. The second capacitor is connected between the other of the second output node pair and the ground node.
Preferably, the variable gain amplifier further includes a plurality of first capacitors and a plurality of second capacitors. Each of the plurality of first capacitors is placed to correspond to one of the corresponding third output node pair among the plurality of third output node pairs. Each of the plurality of second capacitors is placed to correspond to the other of the corresponding third output node pair among the plurality of third output node pairs. Each of the plurality of first capacitors is connected between one of the corresponding third output node pair and a ground node receiving the ground voltage. Each of the plurality of second capacitors is connected between the other of the corresponding third output node pair and the ground node.
In the variable gain amplifier described above, in which the first and second capacitors are provided, the difference between the load capacitance connected to the second output node pair and the load capacitance connected to each of the plurality of third output node pairs can be reduced. This enables further reduction of the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to each of the plurality of third output node pairs.
According to yet another aspect of the present invention, the filter circuit is a GMC filter circuit including a plurality of transconductors and a plurality of capacitors. The plurality of capacitors are placed to correspond to the plurality of transconductors. The capacitors are connected between output nodes of the corresponding transconductors and a ground node receiving the ground voltage. The filter circuit further includes the variable gain amplifier described above. The plurality of transconductors include a first transconductor and a plurality of second transconductors. The first transconductor receives at an input a voltage from the second output node pair of the variable gain amplifier. The plurality of second transconductors correspond to the plurality of third output node pairs of the variable gain amplifier. Each of the plurality of second transconductors receives at an input a voltage from the corresponding third output node pair among the plurality of third output node pairs of the variable gain amplifier.
In the filter circuit described above, in which the variable gain amplifier described above is used as an amplifier for adjusting the zero position, the circuit area can be reduced compared with conventional filter circuits.
In addition, since the variable gain amplifier can reduce the difference between the signal delay in the path from the input node pair to the second output node pair and the signal delay in the path from the input node pair to each of the plurality of third output node pairs, deterioration in filter characteristics, in particular, deterioration in group delay can be minimized.
Preferably, one of the input node pair of the variable gain amplifier receives one of a differential input signal to be supplied to the filter circuit, and the other of the input node pair of the variable gain amplifier receives the other of the differential input signal to be supplied to the filter circuit.
Preferably, the plurality of transconductors include a third transconductor. One of the input node pair of the variable gain amplifier receives one of a differential output signal from the third transconductor, and the other of the input node pair of the variable gain amplifier receives the other of the differential output signal from the third transconductor.